TLE 5250

Semiconductor Group

7

1998-02-01

Diagnostics

The information from the different parts of the circuit is collected in the diagnostics and

stored in the fault logic. The information is read out on the Diagnostics output (open

collector).

The fault logic consists of a 16-bit multiplexer that switches information in three

categories through to the Diagnostics output.

Bit 0 always appears inverted on DIAG when EN is High. This means that, if there is

overcurrent on the upper transistor, undervoltage or overtemperature, it will be signaled

immediately on the Diagnostics output. DIAG changes from High to Low.

Bit 1: check bit.

Bits 2, 3, 4 and 5 indicate the momentary status of the comparators on the two outputs

(see Figure 2). Changes in the status of the comparators for output monitoring can be

observed on DIAG when EN is Low and the counter of the multiplexer is on 2, 3, 4 or 5.

This is necessary for detecting underload.

Bits 6, 7, 8, 9

The monoflop generates a short strobe signal when the EN edge changes from High to

Low. The status of the comparators for output monitoring is stored with this signal and

can be read out in bits 6, 7, 8 and 9.

When Enable is Low, the Phase input is used as a clock input. As the edge rises, an

internal counter is incremented and the corresponding channel of the multiplexer is

switched through. As the edge falls, the signal is output inverted. When Enable is High,

the counter is reset to zero.

Figure 3

AED01467

EN

Strobe

Reset