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SP6680 데이터시트(PDF) 8 Page - Sipex Corporation |
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SP6680 데이터시트(HTML) 8 Page - Sipex Corporation |
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8 / 9 page ![]() 8 Date: 5/25/04 SP6680 High Efficiency Buck/Boost Charge Pump Regulator © Copyright 2004 Sipex Corporation Table 3. Output Resistance vs Output Capacitance All Ceramic Capacitors ESR < 0.05ohm Cin, CF1, CF2 = 2.2uF, Vin = 3.85V, Iout = 5mA, CLK = 32kHz Cout (uF) SP6680 Rout (ohms) 0.47 57 128 2.2 18 4.7 13 10 11 22 10 Table 4. Output Resistance vs Pump Capacitance All Ceramic Capacitors ESR < 0.05ohm Cin, Cout = 2.2uF, Vin = 3.85V, Iout = 5mA, CLK = 32kHz CF1, CF2 (uF) SP6680 Rout (ohms) 0.47 39 124 2.2 18 4.7 15 10 14 22 13 # E N O H P E L E T / R E R U T C A F U N A MR E B M U N T R A P / E C N A T I C A P A C E G A T L O V R S E X A M z H k 0 0 1 @ R O T I C A P A C E P Y T / E Z I S 0 0 1 6 - 3 0 8 - 7 4 8 / K D TK 5 2 2 A 1 R 5 X 2 1 0 2 C2 . 2 µ V 0 1 / F0 3 0 . 0 Ω R 5 X / 5 0 8 0 0 0 1 6 - 3 0 8 - 7 4 8 / K D TK 5 7 4 C 1 R 5 X 6 1 2 3 C7 . 4 µ V 0 1 / F0 2 0 . 0 Ω R 5 X / 6 0 2 1 1 1 4 9 - 8 4 4 - 3 4 8 / X V AK 5 2 2 C Z 6 0 2 12 . 2 µ V 0 1 / F0 3 0 . 0 Ω R 7 X / 6 0 2 1 8 8 8 0 - 5 2 9 - 7 4 8 / n e d u Y o y i a TG M 5 2 2 J B 2 1 2 K M L2 . 2 µ V 0 1 / F0 3 0 . 0 Ω R 5 X / 5 0 8 0 8 8 8 0 - 5 2 9 - 7 4 8 / n e d u Y o y i a TL M 5 7 4 J B 6 1 3 K M L7 . 4 µ V 0 1 / F0 2 0 . 0 Ω R 7 X / 6 0 2 1 Board Layout PC board layout is an important design consideration to mitigate switching current effects. High frequency operation makes PC layout important for minimizing ground bounc and noise. Components should be place as close to the IC as possible with connections made through short, low impedance traces. To maximize output ripple voltage, use a ground plane and solder the IC's GND pin directly to the ground plane. Output Resistance with Various Output and Pump Capacitors From Tables 3 & 4 it can be seen that increasing output capacitance alone reduces the output resistance more than increasing pump capacitance. This offers the advantage of increasing one capacitor versus two capacitors in the case for the pump capacitance. Figure 2. Suggested Low ESR Cermic Surface Mount Capacitors. |
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