| 전자부품 데이터시트 검색엔진 |
|
SP703 데이터시트(PDF) 13 Page - Sipex Corporation |
|
|
|||||||||||||||||||||||||||||
SP703 데이터시트(HTML) 13 Page - Sipex Corporation |
|
13 / 16 page ![]() SP703/704DS/07 SP703/704 Low Power Microprocessor Supervisory © Copyright 2000 Sipex Corporation 13 Interfacing to Microprocessors with Bidirectional Reset Pins Microprocessors with bidirectional reset pins, such as the Motorola 68HC11 series, can contend with this series' RESET output. If, for example, the RESET output is driven high and the µP wants to pull it low, indeterminate logic levels may result. To correct this, connect a 4.7K Ω resistor between the RESET output and the µP reset I/O, as in Figure 16. Buffer the RESET output to other system components. Figure 15. Monitoring a Negative Voltage Figure 16. Interfacing to Microprocessors with Bidirectional RESET I/O PFI PFO R2 R1 VCC +5V GND PFO V- +5V *VTRIP 0V 0V 5.0 - 1.25 R1 1.25 - VTRIP R2 V- = *VTRIP is a negative voltage VCC +5V GND VCC +5V GND RESET RESET 4.7K Ω µP Buffered RESET connects to System Components |
|
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |