SP8121DS/02

SP8121 Monolithic, 12-Bit Data Acquisition System

© Copyright 2000 Sipex Corporation

8

R/C

STATUS

DATA VALID

HIGH–Z

HIGH–Z

HIGH PULSE FOR R/C DYNAMIC CHARACTERISTICS

V

PARAMETER

MIN.

TYP.

MAX.

UNIT

CONDITIONS

t

HRH

High R/C Pulse Width

25

ns

t

DS

STATUS Delay from R/C

200

ns

t

C

Conversion Time

13

25

µsT

t

DDR

Data Access Time

150

ns

t

HDR

Data Valid after R/C Low

25

ns

Figure 5. High Pulse for R/C — Outputs Enabled While R/C is High, Otherwise High Impedance

Figure 6. Low Pulse for R/C

R/C

STATUS

DATA VALID

DATA VALID

LOW PULSE FOR R/C DYNAMIC CHARACTERISTICS

V

PARAMETER

MIN.

TYP.

MAX.

UNIT

CONDITIONS

t

HRL

Low R/C Pulse Width

50

ns

t

DS

Status Delay from R/C

200

ns

t

HDR

Data Valid after R/C

25

ns

t

HS

Status Delay after Data Valid 500

ns

t

MDS

MUX Data Setup

50

ns

t

MDH

MUX Data Valid

3

10

µs