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CY29972AXIT 데이터시트(PDF) 6 Page - Cypress Semiconductor

부품명 CY29972AXIT
상세설명  3.3 V, 125-MHz Multi-Output Zero Delay Buffer
PDF  13 Pages
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제조업체  CYPRESS [Cypress Semiconductor]
홈페이지  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY29972AXIT 데이터시트(HTML) 6 Page - Cypress Semiconductor

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CY29972
Document #: 38-07290 Rev. *E
Page 6 of 13
SYNC Output
In situations where output frequency relationships are not integer
multiples of each other, the SYNC output provides a signal for
system synchronization. The CY29972 monitors the relationship
between the QA and QC output clocks. It provides a LOW-going
pulse, one period in duration, one period prior to the coincident
rising edges of the QA and QC outputs. The duration and
placement of the pulse depend on the higher of the QA and QC
output frequencies. The following timing diagram illustrates
various waveforms for the SYNC output. Note that the SYNC
output is defined for all possible combinations of QA and QC
outputs, even though under some relationships the lower
frequency clock could be used as a synchronizing signal.
SYNC
QC
QA
SYNC
QC
QA
SYNC
QA
QC
SYNC
QC
QA
SYNC
QA
QC
SYNC
QC
QA
SYNC
QC
QA
VCO
1:1 Mode
2:1 Mode
3:1 Mode
3:2 Mode
4:1 Mode
4:3 Mode
6:1 Mode
Figure 1. Timing Diagram
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