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SL74HC4046 데이터시트(PDF) 7 Page - System Logic Semiconductor |
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SL74HC4046 데이터시트(HTML) 7 Page - System Logic Semiconductor |
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7 / 12 page ![]() SL74HC4046 System Logic Semiconductor SLS [Demodulator Section] DC ELECTRICAL CHARACTERISTICS VCC Guaranteed Limit Symbol Parameter Test Conditions V 25 °C to -55 °C ≤85°C ≤125°C Unit Min Max Min Max Min Max RS Resistor Range At RS > 300 k Ω the Leakage Current can Influence VDEMOUT 3.0 4.5 6.0 50 50 50 300 300 300 k Ω VOFF Offset Voltage VCOIN to VDEMOUT VI = VVCOIN = 1/2 VCC; Values taken over RS Range 3.0 4.5 6.0 See Figure 10 mV RD Dynamic Output Resistance at DEMOUT VDEMOUT = 1/2 VCC 3.0 4.5 6.0 Typical 25 Ω Ω Figure 1. Switching Waveforms Figure 2. Switching Waveforms Figure 3. Switching Waveforms Figure 4. Test Circuit |
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