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SL74HC75 데이터시트(PDF) 4 Page - System Logic Semiconductor

부품명 SL74HC75
상세설명  Dual 2-Bit Transparent Latch(High-Performance Silicon-Gate CMOS)
PDF  5 Pages
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제조업체  SLS [System Logic Semiconductor]
홈페이지  http://www.slsemicon.co.kr/e_index.htm
Logo SLS - System Logic Semiconductor

SL74HC75 데이터시트(HTML) 4 Page - System Logic Semiconductor

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SL74HC75
System Logic
Semiconductor
SLS
AC ELECTRICAL CHARACTERISTICS(C
L=50pF,Input t r=tf=6.0 ns)
VCC
Guaranteed Limit
Symbol
Parameter
V
25
°C to
-55
°C
≤85°C
≤125°C
Unit
tPLH, tPHL
Maximum Propagation Delay, D to Q (Figures 1
and 5)
2.0
4.5
6.0
125
25
21
155
31
26
190
38
32
ns
tPLH, tPHL
Maximum Propagation Delay , D to Q
(Figures 1 and 5)
2.0
4.5
6.0
110
22
19
140
28
24
165
33
28
ns
tPLH, tPHL
Maximum Propagation Delay ,Latch Enable to Q
(Figures 2 and 5)
2.0
4.5
6.0
145
29
25
180
36
31
220
44
38
ns
tPLH, tPHL
Maximum Propagation Delay ,Latch Enable to Q
(Figures 2 and 5)
2.0
4.5
6.0
125
25
21
155
31
26
190
38
32
ns
tTLH, tTHL
Maximum Output Transition Time, Any Output
(Figures 3 and 5)
2.0
4.5
6.0
75
15
13
95
19
16
110
22
19
ns
CIN
Maximum Input Capacitance
-
10
10
10
pF
Power Dissipation Capacitance (Per Latch)
Typical @25
°C,V
CC=5.0 V
CPD
Used to determine the no-load dynamic power
consumption:
PD=CPDVCC
2f+I
CCVCC
35
pF
TIMING REQUIREMENTS (C
L=50pF,Input t r=tf=6.0 ns)
VCC
Guaranteed Limit
Symbol
Parameter
V
25
°C to
-55
°C
≤85°C
≤125°C
Unit
tSU
Minimum Setup Time,
Input D to Latch Enable
(Figure 4)
2.0
4.5
6.0
100
20
17
125
25
21
150
30
26
ns
th
Minimum Hold Time,Latch
Enable to D (Figure 4)
2.0
4.5
6.0
25
5
5
30
6
6
40
8
7
ns
tw
Minimum Pulse Width, Latch
Enable Input
(Figure 2)
2.0
4.5
6.0
80
16
14
100
20
17
120
24
20
ns
tr, tf
Maximum Input Rise and Fall
Times (Figure 1)
2.0
4.5
6.0
1000
500
400
1000
500
400
1000
500
400
ns



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