CSD87331Q3D

SLPS283A

– SEPTEMBER 2011 – REVISED JANUARY 2012

www.ti.com

Thermal Performance

The Power Block has the ability to utilize the GND planes as the primary thermal path. As such, the use of

thermal vias is an effective way to pull away heat from the device and into the system board. Concerns of solder

voids and manufacturability problems can be addressed by the use of three basic tactics to minimize the amount

of solder attach that will wick down the via barrel:

•

Intentionally space out the vias from each other to avoid a cluster of holes in a given area.

•

Use the smallest drill size allowed in your design. The example in Figure 34 uses vias with a 10 mil drill hole

and a 16 mil capture pad.

•

Tent the opposite side of the via with solder-mask.

In the end, the number and drill size of the thermal vias should align with the end user

’s PCB design rules and

manufacturing capabilities.

Figure 34. Recommended PCB Layout (Top Down)

14

Submit Documentation Feedback

Copyright

© 2011–2012, Texas Instruments Incorporated