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MMA8653FC 데이터시트(PDF) 30 Page - Freescale Semiconductor, Inc |
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MMA8653FC 데이터시트(HTML) 30 Page - Freescale Semiconductor, Inc |
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30 / 56 page ![]() MMA8653FC Sensors 30 Freescale Semiconductor, Inc. 6.5.3 0x12: PL_COUNT, Portrait/Landscape Debounce Counter Register This register sets the debounce count for the orientation state transition. The minimum debounce latency is determined by the data rate set by the product of the selected system ODR and PL_COUNT registers. Any transition from WAKE to SLEEP or vice versa resets the internal Landscape/Portrait debounce counter. NOTE The debounce counter weighting (time step) changes based on the ODR and the Oversampling mode. Table 21, “PL_COUNT Relationship with the ODR" explains the time step value for all sample rates and all Oversampling modes. Figure 28. 0x12: PL_COUNT, Portrait/Landscape Debounce Counter Register (Read/Write) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 DBNCE[7] DBNCE[6] DBNCE[5] DBNCE[4] DBNCE[3] DBNCE[2] DBNCE[1] DBNCE[0] Table 20. PL_COUNT register Field Description DBCNE[7:0] Debounce Count value. Default value: 0000_0000. Table 21. PL_COUNT Relationship with the ODR ODR (Hz) Max Time Range (s) Time Step (ms) Normal LPLN HighRes LP Normal LPLN HighRes LP 800 0.319 0.319 0.319 0.319 1.25 1.25 1.25 1.25 400 0.638 0.638 0.638 0.638 2.5 2.5 2.5 2.5 200 1.28 1.28 0.638 1.28 5 5 2.5 5 100 2.55 2.55 0.638 2.55 10 10 2.5 10 50 5.1 5.1 0.638 5.1 20 20 2.5 20 12.5 5.1 20.4 0.638 20.4 20 80 2.5 80 6.25 5.1 20.4 0.638 40.8 20 80 2.5 160 1.56 5.1 20.4 0.638 40.8 20 80 2.5 160 |
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