L6472PD datasheet(30/69 Pages) STMICROELECTRONICS

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Functional description

L6472

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Doc ID 022729 Rev 1

6.13

External switch (SW pin)

The SW input is internally pulled-up to VDD and detects if the pin is open or connected to

ground (see Figure ).

The SW_F bit of the STATUS register indicates if the switch is open (‘0’) or closed (‘1’) (see

Section 9.1.19); the bit value is refreshed at every system clock cycle (125 ns). The

SW_EVN flag of the STATUS register is raised when a switch turn-on event (SW input falling

edge) is detected (see Section 9.1.19). A GetStatus command releases the SW_EVN flag

(see Section 9.2.20).

By default a switch turn-on event causes a HardStop interrupt (SW_MODE bit of the

CONFIG register set to ‘0’). Otherwise (SW_MODE bit of the CONFIG register set to ‘1’),

switch input events do not cause interrupts and the switch status information is at the user’s

disposal (see Table 25).

The switch input can be used by the GoUntil and ReleaseSW commands as described in

Section 9.2.10 and 9.2.11.

If the SW input is not used, it should be connected to VDD.

6.14

Programmable DMOS slew rate, dead time and blanking time

Using the POW_SR parameter in the CONFIG register, it is possible to set the commutation

speed of the power bridge output (see Table 27).

6.15

Integrated analog-to-digital converter

The L6472 integrates an NADC bit ramp-compare analog-to-digital converter with a

reference voltage equal to VREG. The analog-to-digital converter input is available through

the ADCIN pin and the conversion result is available in the ADC_OUT register (see

Section 9.1.13). The sampling frequency is equal to the clock frequency divided by 512.

The ADC_OUT value can be used for the torque regulation or can remain at the user’s

disposal.

Figure 13.

External switch connection

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