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부품명 TAS5721
상세설명  Digital Audio Power Amplifier with EQ, DRC, 2.1 Support, and Headphone/Line Driver
PDF  71 Pages
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제조업체  TI1 [Texas Instruments]
홈페이지  http://www.ti.com
Logo TI1 - Texas Instruments

TAS5721 데이터시트(HTML) 11 Page - Texas Instruments

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background image
t
h1
t
su1
t
(edge)
t
su2
t
h2
SCLK
(Input)
LRCLK
(Input)
SDIN
T0026-04
t
r
t
f
TAS5721
www.ti.com
SLOS739 – JULY 2012
Serial Audio Port Timing
PVDD = 18 V, AVDD = DRVDD = DVDD = 3.3 V, audio input signal =1 kHz sine wave, BTL, AD mode, fS = 48 kHz, RSPK = 8
Ω, AES17 filter, fPWM = 384 kHz, external components per Typical Application Circuit diagrams, and in accordance with
recommended operating conditions (unless otherwise specified).
TEST
PARAMETER
MIN
TYP
MAX
UNIT
CONDITIONS
fSCLKIN
Frequency, SCLK 32 × fS, 48 × fS, 64 × fS
CL = 30 pF
1.024
12.288
MHz
tsu1
Setup time, LRCLK to SCLK rising edge
10
ns
th1
Hold time, LRCLK from SCLK rising edge
10
ns
tsu2
Setup time, SDIN to SCLK rising edge
10
ns
th2
Hold time, SDIN from SCLK rising edge
10
ns
LRCLK frequency
8
48
48
kHz
SCLK duty cycle
40%
50%
60%
LRCLK duty cycle
40%
50%
60%
SCLK
SCLK rising edges between LRCLK rising edges
32
64
edges
t(edge)
SCLK
LRCLK clock edge with respect to the falling edge of SCLK
–1/4
1/4
period
tr/tf
Rise/fall time for SCLK/LRCLK
8
ns
LRCLK allowable drift before LRCLK reset
4
MCLK
Periods
Figure 8. Serial Audio Port Timing
Copyright © 2012, Texas Instruments Incorporated
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