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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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SN65MLVD040 데이터시트(PDF) 13 Page - Texas Instruments |
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SN65MLVD040 데이터시트(HTML) 13 Page - Texas Instruments |
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13 / 29 page  1.2 V 1.0 V tpLH 0.2 V -0.2 V VA VB VID 90% VOH VOL tpHL 10% tf tr VO VCC/2 VO VID VB VA CL 0 V 15 pF SN65MLVD040 www.ti.com SLLS902 – FEBRUARY 2010 A. All input pulses are supplied by a generator having the following characteristics: tr or tf ≤ 1 ns, frequency = 1 MHz, duty cycle = 50 ±5%. CL is a combination of a 20%-tolerance, low-loss ceramic, surface-mount capacitor and fixture capacitance within 2 cm of the D.U.T. B. The measurement is made on test equipment with a –3 dB bandwidth of at least 1 GHz. Figure 10. Receiver Timing Test Circuit and Waveforms Copyright © 2010, Texas Instruments Incorporated Submit Documentation Feedback 13 Product Folder Link(s) :SN65MLVD040 |
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