Layout Considerations

TPS65166

PCB layout is an important step in power supply design.

• NC pins 5, 8, 22, and 29 should not be connected to GND, if so, the device is not P2P short protected any

more.

• The input capacitors should be placed as close as possible to the device. AVIN, VIN1, and VIN2 must be

shorted.

• The buffer capacitor C25 must be connected to VL+ and AGND/VL- by a single trace.

• The line device, diode, output cap of the buck boost should be kept as short as possible.

• For the boost converter the line C3 GND output capacitor GND and PGND1 should be kept short.

• For the buck converter the line switch pin SW3, 4 to diode should be kept short.

• All lower feedback resistors connected to GND should be placed close to the device.

• Switching lines should not be next to feedback lines to avoid coupling.

• Use short lines or make sure the lines do not affect other regulating parts for the charge pump switching

connection to SW1,2 because this trace carrys switching waveforms.

• The PowerPAD™ of the QFN package should be soldered to GND and as much as possible thermal vias

should be used to lower the thermal resistance and keep the device cool.

• A solid PCB ground plane structure is essential for good device performance.

• Place red marked components and lines first and as close as possible to the device. Keep red marked lines

short. Bold marked lines should be wide on the PCB, because these traces carry high currents.

• Green marked components can be placed further away.

Copyright © 2009, Texas Instruments Incorporated

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Product Folder Link(s): TPS65166