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SST38VF166 데이터시트(PDF) 17 Page - Silicon Storage Technology, Inc

부품명 SST38VF166
상세설명  16 Megabit FlashBank Memory
PDF  50 Pages
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제조업체  SST [Silicon Storage Technology, Inc]
홈페이지  http://www.sst.com/
Logo SST - Silicon Storage Technology, Inc

SST38VF166 데이터시트(HTML) 17 Page - Silicon Storage Technology, Inc

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Data Sheet
16 Megabit FlashBank Memory
SST38VF166
17
©2001 Silicon Storage Technology, Inc.
327-3 2/01
S71065
AC CHARACTERISTICS
TABLE 21: READ CYCLE TIMING PARAMETERS
Symbol
Parameter
SST38VF166-70
Units
Min
Max
TRC
Read Cycle Time
70
ns
TBE
Bank Enable Access Time
70
ns
TAA
Address Access Time
70
ns
TOE
Output Enable Access Time
30
ns
TCLZ1
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
CE# Low to Active Output
0
ns
TOLZ1
OE# Low to Active Output
0
ns
TCHZ1
CE# High to High-Z Output
20
ns
TOHZ1
OE# High to High-Z Output
20
ns
TOH1
Output Hold from Address Change
0
ns
T21.1 327
TABLE 22: WRITE, ERASE, PROGRAM CYCLE TIMING PARAMETERS
Symbol
Parameter
Min
Max
Units
TWC
Word-Write Cycle (Erase and Program)
12.5
ms
TBPE
Word-Program Time - E2 Bank
40
µs
TBPF
Word-Program Time - Flash Bank
20
µs
TSEF
Sector-Erase Time - Flash Bank
25
ms
TLEF
Block-Erase Time - Flash Bank
25
ms
TBEF
Bank-Erase Time - Flash Bank
100
ms
TSEE
Sector-Erase Time - E2 Bank
12.5
ms
TBEE
Bank-Erase Time - E2 Bank
100
ms
TAS
Address Setup Time
0
ns
TAH
Address Hold Time
40
ns
TBES
BE# Setup Time
0
ns
TBEH
BE# Hold Time
0
ns
TOES
OE# High Setup Time
0
ns
TOEH
OE# High Hold Time
0
ns
TWP
Write Pulse Low Width
40
ns
TWPH
Write Pulse High Time
30
ns
TDS
Data Setup Time
40
ns
TDH
Data Hold Time
0
ns
TVDDR1
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
VDD Rise Time
0.1
50
ms
TDBR
Time to DATA# Polling Read
35
ns
TTBR
Time to Toggle Bit Read
35
ns
TIDA
Time to ID or CFI Read/Exit Cycle
150
ns
TBS
Bank Enable Setup Time for Concurrent Operation
0
ns
T22.0 327



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