FM33256B datasheet(21/29 Pages) RAMTRON

21 / 29 page

FM33256B SPI Companion w/ FRAM

This product conforms to specifications per the terms of the Ramtron

Ramtron International Corporation

standard warranty. The product has completed Ramtron’s internal

1850 Ramtron Drive, Colorado Springs, CO 80921

qualification testing and has reached production status.

(800) 545-FRAM, (719) 481-7000

www.ramtron.com

Rev. 3.0

Aug. 2012

Page 21 of 28

SCK

Hi-Z

Figure 17. WRDI Bus Configuration

RDSR – Read Status Register

The RDSR command allows the bus master to verify

the contents of the Status Register. Reading this

of the write protection bits. Following the RDSR op-

code, the FM33256B will return one byte with the

contents of the Status Register. The Status Register

is described in detail in a later section.

WRSR – Write Status Register

The WRSR command allows the user to select

certain write protection features by writing a byte to

the Status Register. Prior to sending the WRSR

command, the user must send a WREN command to

enable

writes.

Note

that

executing

WRSR

command is a write operation and therefore clears

the Write Enable Latch. The bus timings of RDSR

and WRSR are shown below.

Figure 18. RDSR Bus Configuration

Figure 19. WRSR Bus Configuration

(WREN must precede WRSR)

RDPC – Read Processor Companion

The RDPC command allows the bus master to verify

the contents of the Processor Companion registers.

Following the RDPC op-code, a single-byte register

address is sent. The FM33256B will then return one

or more bytes with the contents of the companion

registers. When reading multiple data bytes, the

nternal register address will wrap around to 00h after

1Dh is reached.

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