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TNETA1585PGF 데이터시트(PDF) 16 Page - Texas Instruments

부품명 TNETA1585PGF
상세설명  ATM TRAFFIC MANAGEMENT SCHEDULER DEVICE WITH RECEIVE UTOPIA AND COPROCESSOR INTERFACES
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제조업체  TI1 [Texas Instruments]
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TNETA1585PGF 데이터시트(HTML) 16 Page - Texas Instruments

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TNETA1585
ATM TRAFFIC MANAGEMENT SCHEDULER DEVICE
WITH RECEIVE UTOPIA AND COPROCESSOR INTERFACES
SDNS041A – NOVEMBER 1996 – REVISED JULY 1998
16
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
connecting the TNETA1585 to the UTOPIA bus in PHY mode (see Figure 2)
Switch Port
or Other
PHY Layer
Devices
TNETA1575
PHY mode
ATMCLK1 (82)
ATMCLK2 (64)
RESCLK (66)
RESDATA7–RESDATA0 (72–75, 77–80)
TXData
TXClk
RESSOC (70)
TXSoc
RESEN (67)
TXEnb
RESCLAV (69)
TXFull/TXClav
RESPAR (71)
TXPrty
RESPERR (81)
SEGCLK (95)
RXClk
SEGDATA7–SEGDATA0 (84–87, 89–92)
RXData
SEGSOC (97)
RXSoc
SEGEN (96)
RXEnb
SEGCLAV (98)
RXClav
SEGPAR (94)
RXPrty
VCC
PHY/ATM (83)
TNETA1585†
PHY mode
RXCLK (24)
RXDATA7–RXDATA0 (10, 12–13, 15–18, 20)
RXSOC (21)
RXCLAV (22)
RXEN (23)
GND
CONFIG (9)
UTOPIA
Bus
TXData7–TXData0
TXSoc
TXEnb
TXClav
CLOCK (26)
† Terminal numbers are for the
PCM package.
Figure 2. UTOPIA Bus Connections In PHY Mode



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