| 전자부품 데이터시트 검색엔진 |
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TM4EP72CJB 데이터시트(PDF) 2 Page - Texas Instruments |
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TM4EP72CJB 데이터시트(HTML) 2 Page - Texas Instruments |
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2 / 13 page ![]() TM4EP72BPB, TM4EP72BJB, 4194304 BY 72BIT TM4EP72CPB, TM4EP72CJB 4194304 BY 72BIT EXTENDEDDATAOUT BUFFERED DYNAMIC RAM MODULES SMMS686A − AUGUST 1997 − REVISED FEBRUARY 1998 2 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 PRESENCE DETECT PIN − 50 − 60 − 70 PD1 1 1 1 PD2 1 1 1 PD3 0 0 0 PD4 1 1 1 PD5 1 1 1 PD6 0 1 0 PD7 0 1 1 PD8 0 0 0 ID0 0 0 0 ID1 0 0 0 DUAL-IN-LINE MEMORY MODULE ( TOP VIEW ) TM4EP72xPB ( SIDE VIEW ) 1 10 11 40 84 41 PIN NOMENCLATURE − TM4EP72BxB A[0:10] Row-Address Inputs A[0:10] Column-Address Inputs B0 Addr0 for Bank 2 Devices DQ[0:63] Data In / Data Out CB[0:7] Check Bit In / Check Bit Out ID[0:1] ID Pins CAS0 and CAS4 Column-Address Strobe RAS0 and RAS2 Row-Address Strobe WE0 and WE2 Write Enable OE0 and OE2 Output Enable PD[1:8] Presence Detect PDE Presence Detect Enable NC No-Connect Pin VDD 3.3-V Supply VSS Ground PIN NOMENCLATURE − TM4EP72CxB A[0:11] Row-Address Inputs A[0:9] Column-Address Inputs B0 Addr0 for Bank 2 Devices DQ[0:63] Data In / Data Out CB[0:7] Check Bit In / Check Bit Out ID[0:1] ID Pins CAS0 and CAS4 Column-Address Strobe RAS0 and RAS2 Row-Address Strobe WE0 and WE2 Write Enable OE0 and OE2 Output Enable PD[1:8] Presence Detect PDE Presence Detect Enable NC No-Connect Pin VDD 3.3-V Supply VSS Ground |
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