CXA3003R datasheet(13/32 Pages) SONY

부품명	CXA3003R

상세설명	Baseband analog processing IC for dual-mode CDMA/FM cellular phone

PDF	32 Pages

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제조업체	SONY [Sony Corporation]

홈페이지	http://www.sony.co.jp

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13 / 32 page

—13—

CXA3003R

tclk-hi

tclk-lo

tsud-d

thd-d

thd-s

tsud-s

LSB+1

LSB

XXX

MSB

MSB-1

LSB

FMCLK

(input)

FMRXSTROBE

(input)

FXRXDATA (I, Q)

(output)

FMCLK=360kHz

FMRXSTROBE=40kHz

Fig. 4 FMCLK, FMRXSTROBE vs. RXFMDATA (I, Q) timing diagram

Note : FM RXSTROBE pulse width must be

≤ one FMCLK period.

ADCENABLE & ADC CLK vs. ADC DATA

(VDD=3.3 V±5 %, Ta=–40 °C to 85 °C)

Item

Enable True to first Clock output

Enable Pulse to end of conversion

Data out valid to CLK rising edge

Data out valid after CLK rising edge

Enable True Pulse width

Output raise time

Output fall time

Symbol

ten-clk

tdEn-EOC

tsue-d

the-d

ten-pw

tre

tfe

Condition

10 % to 90 %, Cl=15 pF

Min.

Typ.

Max.

Unit

µs

16.8

600

µs

7.2

9.9

ten-pw

ten-clk

MSB

LSB

the-d

tsue-d

tdEn-EOC

ADCENABLE

ADCCLK

ADCDATA

ADCCLK=820kHz (TCXO÷24)

Fig. 5 ADCENABLE & ADC CLK vs. ADC DATA timing diagram

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