| 전자부품 데이터시트 검색엔진 |
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MCP2021 데이터시트(PDF) 10 Page - Microchip Technology |
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MCP2021 데이터시트(HTML) 10 Page - Microchip Technology |
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10 / 52 page ![]() MCP2021/2/1P/2P DS22018F-page 10 © 2005-2012 Microchip Technology Inc. FIGURE 1-5: Forced Power-Down Mode Sequence for MCP2021P/2P. CS/LWAKE VREG FAULT/TXE LBUS Operation Mode Transmitter-Off Mode Power-Down Mode tCSactive> = 2S FAULT/TXE = 1 Forced internally FAULT/TXE = 0 Forced externally LBUS disconnected; e.g., Master pull-up & internal resistor off; LBUS floating. Forced Power-Down Mode after BUS-OFF instruction or a longer LIN-Bus inactivity ( > = 4 sec according to LIN specification) STATE |
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