CXD2467Q datasheet(5/38 Pages) SONY

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CXD2467Q

CLKOUT

Vss

CLKSEL1

CLKSEL2

CLKPOL1

HDIN2

HDPOL2

CLK3P

CLK3N

VDD

VSS

CLK3C

VSS

CLK4

CLKSEL3

CLKSEL4

CLKPOL2

IRRET

HRET

VSS

XCLR

VDD

VSS

B2OUT0

B2OUT1

B2OUT2

B2OUT3

B2OUT4

B2OUT5

B2OUT6

B2OUT7

B2OUT8

B2OUT9

—

1/2 frequency-divided clock output

GND

Input clock selection (High: CLK1C, Low: CLK1P, N)

Input clock selection (High: CLK2, Low: CLK1)

1/2 frequency division circuit output selection

(High: XQ output, Low: Q output)

Horizontal sync signal input-2

HDIN2 input polarity selection

(High: positive polarity, Low: negative polarity)

Clock input-2 (small-amplitude differential input, positive polarity)

Clock input-2 (small-amplitude differential input, negative polarity)

Power supply

GND

Clock input-2 (CMOS input)

GND

1/2 frequency-divided clock input-2 (CMOS input)

Input clock selection (High: CLK3C, Low: CLK3P, N)

Input clock selection (High: CLK4, Low: CLK3)

1/2 frequency division circuit output selection

(High: XQ output, Low: Q output)

Auxiliary pulse output

GND

External clear (Low: reset)

Power supply

GND

Blue data output (port 2)

—

No.

Symbol

I/O

Description

Input pin

processing

for open status

CXD2467Q 데이터시트(PDF) 5 Page - Sony Corporation

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