ACE721C

1.2A 1.5MHz 7V Synchronous Buck Converter

VER 1.3

7

UVLO and Thermal Shutdown

If IN drops below 2.5V, the UVLO circuit inhibits switching. Once IN rises above 2.6V, the UVLO clears,

and the soft-start sequence activates. Thermal-overload protection limits total power dissipation in the

device. When the junction temperature exceeds TJ= +160°C, a thermal sensor forces the device into

shutdown, allowing the die to cool. The thermal sensor turns the device on again after the junction

temperature cools by 15°C, resulting in a pulsed output during continuous overload conditions. Following

a thermal-shutdown condition, the soft-start sequence begins.

Design Procedure

Setting Output Voltages

Output voltages are set by external resistors. The FB_ threshold is 0.6V.

RTOP = RBOTTOM[(VOUT / 0.6) - 1]

Input Capacitor Selection

The input capacitor in a DC-to-DC converter reduces current peaks drawn from the battery or other input

power source and reduces switching noise in the controller. The impedance of the input capacitor at the

switching frequency should be less than that of the input source so high-frequency switching currents do

not pass through the input source. The output capacitor keeps output ripple small and ensures

control-loop stability. The output capacitor must also have low impedance at the switching frequency.

Ceramic, polymer, and tantalum capacitors are suitable, with ceramic

exhibiting the lowest ESR and

high-frequency impedance. Output ripple with a ceramic output capacitor is approximately as follows:

VRIPPLE = IL(PEAK)[

1 / (2π x fOSC x COUT)] If the capacitor has significant ESR, the output ripple

component due to capacitor ESR is as follows: VRIPPLE(ESR) = IL(PEAK) x ESR

Application Information

Layout is critical to achieve clean and stable operation. The switching power stage requires particular

attention. Follow these guidelines for good PC board layout:

1) Place decoupling capacitors as close to the IC as possible

2) Connect input and output capacitors to the same power ground node with a star ground configuration

then to IC ground.

3) Keep the high-current paths as short and wide as possible. Keep the path of switching current (C1 to

IN and C1 to GND) short. Avoid vias in the switching paths.

4) If possible, connect IN, SW, and GND separately to a large copper area to help cool the IC to further

improve efficiency and long-term reliability.

5) Ensure all feedback connections are short and direct. Place the feedback resistors as close to the IC

as possible.

6)

Route high-speed switching nodes away from sensitive analog areas