STA333W datasheet(30/49 Pages) STMICROELECTRONICS

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STA333W

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Doc ID 13365 Rev 2

Zero-crossing volume enable

The ZCE bit enables zero-crossing volume adjustments. When volume is adjusted on digital

zero-crossings no clicks will be audible.

Soft volume update enable

6.1.6

Configuration register F (addr 0x05)

Invalid Input detect mute enable

Setting the IDE bit enables this function, which looks at the input I2S data and will

automatically mute if the signals are perceived as invalid.

Binary output mode clock loss detection

Detects loss of input MCLK in binary mode and outputs 50% of the duty cycle.

Table 31.

Zero-crossing volume enable

Bit

R/W

RST

Name

Description

6R/W

1ZCE

1: volume adjustments will only occur at digital

zero-crossings

0: volume adjustments will occur immediately

Table 32.

Zero-crossing volume enable

Bit

R/W

RST

Name

Description

7R/W

1SVE

1: volume adjustments ramp according to SVR

settings

0: volume adjustments will occur immediately

EAPD

PWDN

ECLE

LDTE

BCLE

IDE

Reserved

Table 33.

Invalid input detect mute enable

Bit

R/W

RST

Name

Description

R/W

IDE

1: enables the automatic invalid input detect mute

Table 34.

Binary output mode clock loss detection

Bit

R/W

RST

Name

Description

R/W

BCLE

Binary output mode clock loss detection enable

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