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CXG1053FN 데이터시트(PDF) 4 Page - Sony Corporation

부품명 CXG1053FN
상세설명  Power Amplifier/Antenna Switch Low Noise Amplifier/Down Conversion Mixer for PHS
PDF  8 Pages
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제조업체  SONY [Sony Corporation]
홈페이지  http://www.sony.co.jp
Logo SONY - Sony Corporation

CXG1053FN 데이터시트(HTML) 4 Page - Sony Corporation

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– 4 –
CXG1053FN
(b) Mixer Block
Unless otherwise specified: VDD = 3V, RF = 1.90GHz/–25dBm, LO = 1.66GHz/–12dBm, Ta = 25°C
LO block current consumption
IF block current consumption
Conversion gain
Noise figure
Input IP3
LO to ANT leak
IDD_LO
IDD_IF
GC
NF
IIP3
PLK
7
–2
1.7
3.3
9
8.5
+1
–43
2.5
4.5
11
11.5
–38
mA
mA
dB
dB
dBm
dBm
When no signal
When no signal
∗2
∗3
∗2 Conversion from IM3 compression ratio during FR1 = 1.9000GHz/–25dBm and FR2 = 1.9006GHz/–25dBm
input.
∗3 The RF
OUT
pin of the LNA and the RFIN pin of the MIX block is connected directly with the cable.
And the power supply of the LNA is turned on.
(c) Total of (a) + (b)
Current consumption
IDD_total
7.5
10
mA
When no signal
3. Antenna Switch Receiver Block + Front-end Block
These specifications are when the Sony's recommended evaluation board with the external circuit shown on
page 7 is used. Therefore, the antenna switch reception pin (Rx) and the low noise amplifier input pin
(RFIN_LNA) are connected via an external circuit. The specifications of the low noise amplifier block are set
including the antenna switch reception block.
(a) Antenna switch receiver block + low noise amplifier block
Unless otherwise specified: VDD = 3V, VCTL1 = 0V, VCTL2 = 3V, RF = 1.9GHz/–30dBm, Ta = 25°C
Current consumption
Power gain
Noise figure
Input IP3
Isolation
Item
IDD_LNA
GP
NF
IIP3
ISO
Symbol
12.5
–11
25
Min.
2.5
14.5
2.7
–8
30
Typ.
3.5
16.5
3.5
Max.
mA
dB
dB
dBm
dB
Unit
When no signal
∗1
Measurement conditions
Item
Symbol
Min.
Typ.
Max.
Unit
Measurement conditions
Item
Symbol
Min.
Typ.
Max.
Unit
Measurement conditions
∗1 Conversion from IM3 compression ratio during FR1 = 1.9000GHz/–30dBm and FR2 = 1.9006GHz/–30dBm
input.



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