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STLC3075 데이터시트(PDF) 15 Page - STMicroelectronics

부품명 STLC3075
상세설명  Integrated POTS interface for home access gateway and WLL
PDF  36 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STLC3075 데이터시트(HTML) 15 Page - STMicroelectronics

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STLC3075
Functional description
15/36
Once the ring trip is detected, the DET output is activated (logic level low). At this point the
card controller or a simple logic circuit stops the D2 toggling in order to effectively
disconnect the ring signal and then set the STLC3075 in the proper operating mode
(normally active).
Ring level in presence of more telephones in parallel
As already mentioned in the previous section, the maximum current that can be drawn from
the VPOS supply is controlled and limited via the external RSENSE. This also limits the power
available at the self generated negative battery.
If for any reason the ringer load is too low, the self generated battery drops in order to keep
the power consumption to the fixed limit and consequently the ring voltage level is also
reduced.
In the typical buckboost configuration with RSENSE = 110 mΩ the peak current from VPOS is
limited to around 900 mApk, which correspond to an average current of 700 mA max. In this
condition the STLC3075 can drive up to 3REN with a ring frequency fr=25 Hz
(1REN = 1800
Ω + 1.0 µF, European standard).
In order to drive up to 5REN (1REN= 6930
Ω + 8 µF, US standard) it is necessary to modify
the external components as follows:
CREV = 15nF; RD = 2.2 k
Ω; R
SENSE = 100 mΩ.
In flyback configuration the value of RSENSE = 220 mΩ guarantees to match both European
and USA standards. In order to drive 5REN (US standard) it is necessary to modify the
external component: RD = 2.2 kΩ.



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