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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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WM8740SEDS/RV 데이터시트(PDF) 8 Page - Wolfson Microelectronics plc |
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WM8740SEDS/RV 데이터시트(HTML) 8 Page - Wolfson Microelectronics plc |
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8 / 27 page  WM8740 Production Data w PD, Rev 4.4, April 2010 8 SCKI t SCKIL t SCKIH t SCKY Figure 2 System Clock Timing Requirements Test Conditions AVDD, DVDD = 5V, AGND, DGND = 0V, TA = +25 oC, fs = 48kHz, SCKI = 256fs unless otherwise stated. PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT System Clock Timing Information System clock pulse width high tSCKIH 10 ns System clock pulse width low tSCKIL 10 ns System clock cycle time tSCKY 27 ns ML/I2S MC/DM1 MD/DM0 t MHH t MLD t MCY t MCH t MCL t MDS t MDH LSB t MLS t MLL Figure 3 Program Register Input Timing – SPI Compatible Serial Control Mode Test Conditions AVDD, DVDD = 5V, AGND, DGND = 0V, TA = +25 oC, fs = 48kHz, SCKI = 256fs unless otherwise stated. PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT Program Register Input Information MC/DM1 pulse cycle time tMCY 80 ns MC/DM1 pulse width low tMCL 32 ns MD/DM0 pulse width high tMCH 32 ns MD/DM0 set-up time tMDS 10 ns MC/DM1 hold time tMDH 10 ns ML/I2S pulse width low tMLL 10 ns ML/I2S pulse width high tMHH 10 ns ML/I2S set-up time tMLS 10 ns ML/I2S delay from MC tMLD 10 ns |
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