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WM8213SCDS/V 데이터시트(PDF) 24 Page - Wolfson Microelectronics plc |
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WM8213SCDS/V 데이터시트(HTML) 24 Page - Wolfson Microelectronics plc |
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24 / 38 page ![]() WM8213 Production Data w PD Rev 4.1 July 2008 24 SERIAL INTERFACE: REGISTER READ-BACK Figure 19 shows register read-back in serial mode. Read-back is initiated by writing to the serial bus as described above but with address bit a4 set to 1, followed by an 8-bit dummy data word. Writing address (a5, 1, a3, a2, a1, a0) will cause the contents (d7, d6, d5, d4, d3, d2, d1, d0) of corresponding register (a5, 0, a3, a2, a1, a0) to be output MSB first on pin SDO (on the falling edge of SCK). Note that pin SDO is shared with an output pin, OP[7], therefore OEB should always be held low and the OPD register bit should be set low when register read-back data is expected on this pin. The next word may be read in to SDI while the previous word is still being output on SDO. SCK SEN SDI a5 1 a3 a2 a1 a0 x x xxx xxx Address Data Word d7 d6 d5 d4 d3 d2 d1 d0 Output Data Word SDO/ OP[7] OEB Figure 19 Serial Interface Register Read-back |
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