전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

WM8983GEFL/V 데이터시트(PDF) 39 Page - Wolfson Microelectronics plc

부품명 WM8983GEFL/V
상세설명  Mobile Multimedia CODEC with 1W Speaker Driver
PDF  124 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  WOLFSON [Wolfson Microelectronics plc]
홈페이지  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8983GEFL/V 데이터시트(HTML) 39 Page - Wolfson Microelectronics plc

Back Button WM8983GEFL/V Datasheet HTML 35Page - Wolfson Microelectronics plc WM8983GEFL/V Datasheet HTML 36Page - Wolfson Microelectronics plc WM8983GEFL/V Datasheet HTML 37Page - Wolfson Microelectronics plc WM8983GEFL/V Datasheet HTML 38Page - Wolfson Microelectronics plc WM8983GEFL/V Datasheet HTML 39Page - Wolfson Microelectronics plc WM8983GEFL/V Datasheet HTML 40Page - Wolfson Microelectronics plc WM8983GEFL/V Datasheet HTML 41Page - Wolfson Microelectronics plc WM8983GEFL/V Datasheet HTML 42Page - Wolfson Microelectronics plc WM8983GEFL/V Datasheet HTML 43Page - Wolfson Microelectronics plc Next Button
Zoom Inzoom in Zoom Outzoom out
 39 / 124 page
background image
Production Data
WM8983
w
PD, Rev 4.3, May 2010
39
Figure 21 Microphone Bias Schematic
ANALOGUE TO DIGITAL CONVERTER (ADC)
The WM8983 uses stereo multi-bit, oversampled sigma-delta ADCs. The use of multi-bit feedback
and high oversampling rates reduces the effects of jitter and high frequency noise. The ADC Full
Scale input level is proportional to AVDD1. With a 3.3V supply voltage, the full scale level is 1.0Vrms.
Any voltage greater than full scale may overload the ADC and cause distortion.
ADC DIGITAL FILTERS
The ADC filters perform true 24 bit signal processing to convert the raw multi-bit oversampled data
from the ADC to the correct sampling frequency to be output on the digital audio interface. The digital
filter path for each ADC channel is illustrated in Figure 22.
Figure 22 ADC Digital Filter Path
The ADCs are enabled by the ADCENL/R register bit.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R2
Power
management 2
0
ADCENL
0
Enable ADC left channel:
0 = ADC disabled
1 = ADC enabled
1
ADCENR
0
Enable ADC right channel:
0 = ADC disabled
1 = ADC enabled
Table 13 ADC Enable Control
AGND1
MBVSEL=0
MICBIA
= 1.8 x VMID
= 0.9 X AVDD1
VMI
internal
resistor
internal
resistor
MICBE
MBVSEL=1
MICBIA
= 1.3 x VMID
= 0.65 X AVDD1



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com