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WM8311 데이터시트(PDF) 41 Page - Wolfson Microelectronics plc

부품명 WM8311
상세설명  Processor Power Management Subsystem
PDF  302 Pages
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제조업체  WOLFSON [Wolfson Microelectronics plc]
홈페이지  http://www.wolfsonmicro.com
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WM8311 데이터시트(HTML) 41 Page - Wolfson Microelectronics plc

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Pre-Production
WM8311
w
PP, May 2012, Rev 3.1
41
ADDRESS
BIT
LABEL
DESCRIPTION
1 = Mask interrupt.
Default value is 1 (masked)
Table 4 Power State Interrupts
11.5 POWER STATE GPIO INDICATION
The WM8311 can be configured to generate logic signals via GPIO pins to indicate the current Power
State. See Section 21 for details of configuring GPIO pins.
A GPIO pin configured as “ON state” output will be asserted when the WM8311 is in the ON state.
A GPIO pin configured as “SLEEP state” output will be asserted when the WM8311 is in the SLEEP
state.
11.6 ON PIN FUNCTION
The ON
¯¯ pin is intended for connection to the master power switch on the user’s application. It can be
used to start-up the WM8311 from the SLEEP or OFF states and also to power down the system.
This pin operates on the LDO12 (VPMIC) power domain and has an internal pull-up resistor. This pin
is asserted by shorting it to GND. A de-bounce circuit is provided on this input pin.
The behaviour of the ON
¯¯ pin is programmable. The primary action taken on asserting this pin is
determined by the ON_PIN_PRIMACT register field. Note that the ON_PIN_INT interrupt event is
always raised when the ON
¯¯ pin is asserted.
If the pin is held asserted for longer than the timeout period set by ON_PIN_TO, then a secondary
action is executed. The secondary action is determined by the ON_PIN_SECACT register field.
If the pin is held asserted for a further timeout period, then a tertiary action is executed. The tertiary
action is not programmable, and is to generate an OFF request.
An OFF request initiated by the ON
¯¯ pin may be masked during Battery Charging when the
CHG_OFF_MASK bit is set. This allows user-initiated OFF events to be disabled in order to maintain
the Battery Charger operation. See Section 17.7.2.
The status of the ON
¯¯ pin can be read at any time via the ON_PIN_STS register.
Note that the ON
¯¯ pin control registers are locked by the WM8311 User Key. These registers can only
be changed by writing the appropriate code to the Security register, as described in Section 12.4.
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R16389
(4005h) ON
Pin Control
9:8
ON_PIN_SECACT
01
Secondary action of ON
¯¯ pin (taken
after 1 timeout period)
00 = Interrupt
01 = ON request
10 = OFF request
11 = Reserved
Protected by user key
5:4
ON_PIN_PRIMACT
00
Primary action of ON
¯¯ pin
00 = Ignore
01 = ON request
10 = OFF request
11 = Reserved
Note that an Interrupt is always
raised.
Protected by user key
3
ON_PIN_STS
0
Current status of ON
¯¯ pin
0 = Asserted (logic 0)
1 = Not asserted (logic 1)



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