WM8321 datasheet(30/253 Pages) WOLFSON

30 / 253 page

WM8321

Production Data

PD, February 2012, Rev 4.0

The valid power state transitions are illustrated in Figure 4.

Figure 4 Power States and Transitions

State transitions to/from the NO POWER state are controlled automatically by the internal supply

(VPMIC) voltage generated by LDO12. The device is in the NO POWER state when this voltage is

below the Power-On Reset (POR) threshold. See Section 24 for more details on Power-On Reset.

State transitions to/from the BACKUP state are controlled automatically by the internal supply

(VPMIC) voltage generated by LDO12. The device is in the BACKUP state when this voltage is below

the Device Reset threshold. See Section 24 for more details on Resets.

State transitions to/from the PROGRAM state are required to follow specific control sequences. See

Section 14 for details of the PROGRAM functions.

The remaining transitions between the OFF, ON and SLEEP states may be initiated by a number of

different mechanisms - some of them automatic, some of them user-controlled. Transitions between

these states are time-controlled sequences of events. These are the OFF, ON, SLEEP and WAKE

sequences shown in Figure 4. These transitions are programmable, using data stored in the

integrated OTP memory or else data loaded from an external InstantConfig

TM EEPROM (ICE)

memory. See Section 14 for details.

WM8321 데이터시트(PDF) 30 Page - Wolfson Microelectronics plc