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WM8351CGEB/V 데이터시트(PDF) 91 Page - Wolfson Microelectronics plc

부품명 WM8351CGEB/V
상세설명  Wolfson AudioPlus??Stereo CODEC with Power Management
PDF  330 Pages
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제조업체  WOLFSON [Wolfson Microelectronics plc]
홈페이지  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8351CGEB/V 데이터시트(HTML) 91 Page - Wolfson Microelectronics plc

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Production Data
WM8351
w
PD, April 2012, Rev 4.5
91
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
8:9
AIF_FMT [1:0]
10
(I
2S)
Data format
00 = Right Justified
01 = Left Justified
10 = I
2S
11 = DSP / PCM mode
Note - see Section 13.11 for the
selection of 8-bit mode.
R114 (72h)
Audio
Interface
ADC
Control
7
AIFADC_PD
0
Enables a pull down on ADC data pin
0 = disabled
1 = enabled
6
AIFADCL_SRC
0
Selects Left channel ADC output.
0 = ADC Left channel
1 = ADC Right channel
5
AIFADCR_SRC
1
Selects Right channel ADC output.
0 = ADC Left channel
1 = ADC Right channel
4
AIFADC_TDM_
CHAN
0
ADCDAT TDM Channel Select
0 = ADCDAT outputs data on slot 0
1 = ADCDAT output data on slot 1
3
AIFADC_TDM
0
ADC TDM Enable
0 = Normal ADCDAT operation
1 = TDM enabled on ADCDAT
R115 (73h)
Audio
Interface
DAC
Control
7
AIFDAC_PD
0
Enables a pull down on DAC data pin
0 = disabled
1 = enabled
6
DACL_SRC
0
Selects Left channel DAC input.
0 = DAC Left channel
1 = DAC Right channel
5
DACR_SRC
1
Selects Right channel DAC input.
0 = DAC Left channel
1 = DAC Right channel
4
AIFDAC_TDM_
CHAN
0
DACDAT TDM Channel Select
0 = DACDAT outputs data on slot 0
1 = DACDAT output data on slot 1
3
AIFDAC_TDM
0
DAC TDM Enable
0 = Normal DACDAT operation
1 = TDM enabled on DACDAT
Table 46 Selecting the Audio Data Format
In Left Justified mode, the MSB is available on the first rising edge of BCLK following an LRCLK
transition. The other bits up to the LSB are then transmitted in order. Depending on word length,
BCLK frequency and sample rate, there may be unused BCLK cycles before each LRCLK transition.
Figure 50 Left Justified Audio Interface (assuming n-bit word length)



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