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WM8523GEFL/V 데이터시트(PDF) 28 Page - Wolfson Microelectronics plc |
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WM8523GEFL/V 데이터시트(HTML) 28 Page - Wolfson Microelectronics plc |
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28 / 51 page ![]() WM8523 Production Data w PD, Rev 4.1, August 2011 28 Figure 23 SYS_ENA[1:0] Power Up and Down Sequences DIGITAL VOLUME CONTROL The WM8523 DAC includes digital volume control, allowing the digital gain to be adjusted between −100dB and +12dB in 0.25dB steps. Volume update bits allow the user to write both left and right channel volume changes before the volume is updated. Digital volume control is only available in I2C mode. REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R6 DAC_GAINL 06h 8:0 DACL _VOL[8:0] 110001000 DAC Digital Volume 0 0000 0000 = −100dB 0 0000 0001 = −99.75dB 0 0000 0010 = −99.5dB …0.25dB steps 1 1001 0000 = 0dB …0.25dB steps 1 1011 1110 = +11.75dB 1 11XX XXXX = +12dB R7 DAC_GAINR 07h 8:0 DACR _VOL[8:0] R6 DAC_GAINL 06h 9 DACL_VU 0 DAC Digital Volume Update 0 = Latch DAC volume setting into Register Map but do not update volume 1 = Latch DAC volume setting into Register Map and update left and right channels simultaneously R7 DAC_GAINR 07h 9 DACR_VU 0 Table 13 DAC Digital Volume Control |
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