| 전자부품 데이터시트 검색엔진 |
|
PXD10PB 데이터시트(PDF) 6 Page - Freescale Semiconductor, Inc |
|
|
|||||||||||||||||||||||||||||
PXD10PB 데이터시트(HTML) 6 Page - Freescale Semiconductor, Inc |
|
6 / 26 page ![]() PXD10 Product Brief, Rev. 1 Features Freescale Semiconductor 6 necessary peripherals, clock sources, clock speed and system clock prescalers can be independently configured for each of the four RUN modes of the device. HALT mode is a reduced activity, low power mode intended for moderate periods of lower processing activity. In this mode the core system clocks are stopped but user-selected peripheral tasks can continue to run. It can be configured to provide more efficient power management features (switch-off PLL, flash memory, main regulator, etc.) at the cost of longer wake up latency. The system returns to RUN mode as soon as an event or interrupt is pending. |
|
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |