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PXS20 데이터시트(PDF) 98 Page - Freescale Semiconductor, Inc |
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PXS20 데이터시트(HTML) 98 Page - Freescale Semiconductor, Inc |
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98 / 119 page ![]() PXS20 Microcontroller Data Sheet, Rev. 1 Preliminary—Subject to Change Without Notice Electrical characteristics Freescale Semiconductor 98 Figure 16. Functional Reset Sequence Long Figure 17. Functional Reset Sequence Short The reset sequences shown in Figure 16 and Figure 17 are triggered by functional reset events. RESET is driven low during these two reset sequences only if the corresponding functional reset source (which triggered the reset sequence) was enabled to drive RESET low for the duration of the internal reset sequence1. 3.19.3 Reset sequence trigger mapping The following table shows the possible trigger events for the different reset sequences. It specifies the reset sequence start conditions as well as the reset sequence end indications that are the basis for the timing data provided in Table 29. 1.See RGM_FBRE register for more details. PHASE3 PHASE1,2 Flash init Device Config DRUN Application Execution TFRL, min < TReset < TFRL, max Reset Sequence Trigger Reset Sequence Start Condition RESET_B RESET PHASE3 DRUN Application Execution TFRS, min < TReset < TFRS, max Reset Sequence Trigger Reset Sequence Start Condition RESET_B RESET |
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