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ADMP441 데이터시트(PDF) 4 Page - Analog Devices

부품명 ADMP441
상세설명  Omnidirectional Microphone with Bottom Port and I2S Digital Output
PDF  16 Pages
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제조업체  AD [Analog Devices]
홈페이지  http://www.analog.com
Logo AD - Analog Devices

ADMP441 데이터시트(HTML) 4 Page - Analog Devices

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ADMP441
Data Sheet
Rev. B | Page 4 of 16
I²S DIGITAL INPUT/OUTPUT
–40°C < TA < +85°C, 1.8 V < VDD < 3.3 V, unless otherwise noted.
Table 2.
Limit1
Parameter
Symbol
Test Conditions/Comments
Min
Max
Unit
DIGITAL INPUT
Voltage Input Low (L/R, WS, SCK)
V
IL
0
0.25 × VDD
V
Voltage Input High (L/R, WS, SCK)
V
IH
0.7 × V
DD
V
DD
V
SD DIGITAL OUTPUT
Voltage Output Low
V
OL
V
DD = 1.8 V, ISINK = 0.25 mA
0.1 × V
DD
V
Voltage Output Low
V
OL
V
DD = 1.8 V, ISINK = 0.7 mA
0.3 × V
DD
V
Voltage Output High
V
OH
V
DD = 1.8 V, ISINK = 0.7 mA
0.7 × V
DD
V
Voltage Output High
V
OH
V
DD = 1.8 V, ISINK = 0.25 mA
0.9 × V
DD
V
Voltage Output Low
V
OL
V
DD = 3.3 V, ISINK = 0.5 mA
0.1 × V
DD
V
Voltage Output Low
V
OL
V
DD = 3.3 V, ISINK = 1.7 mA
0.3 × V
DD
V
Voltage Output High
V
OH
V
DD = 3.3 V, ISINK = 1.7 mA
0.7 × V
DD
V
Voltage Output High
V
OH
V
DD = 3.3 V, ISINK = 0.5 mA
0.9 × V
DD
V
1 Limits based on characterization results; not production tested.
Table 3. Serial Data Port Timing Specifications
Parameter
Description
Min
Max
Unit
t
SCH
SCK high
50
ns
t
SCL
SCK low
50
ns
t
SCP
SCK period
312
ns
f
SCK
SCK frequency
0.5
3.2
MHz
t
WSS
WS setup
0
ns
t
WSH
WS hold
20
ns
f
WS
WS frequency
7.8
49.3
kHz
TIMING DIAGRAM
SCK
WS
SD
tSCP
tSCH
tSCL
tWSH
tWSS
Figure 3. Serial Data Port Timing



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