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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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AT91SAM 데이터시트(PDF) 31 Page - ATMEL Corporation |
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AT91SAM 데이터시트(HTML) 31 Page - ATMEL Corporation |
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31 / 67 page  31 11100BS–ATARM–31-Jul-12 SAM4S Series [Preliminary] 7.7 Debug and Test Features • Debug access to all memory and registers in the system, including Cortex-M4 register bank when the core is running, halted, or held in reset. • Serial Wire Debug Port (SW-DP) and Serial Wire JTAG Debug Port (SWJ-DP) debug access • Flash Patch and Breakpoint (FPB) unit for implementing breakpoints and code patches • Data Watchpoint and Trace (DWT) unit for implementing watch points, data tracing, and system profiling • Instrumentation Trace Macrocell (ITM) for support of printf style debugging •IEEE ®1149.1 JTAG Boundary scan on All Digital Pins PIOA Receive TWI1 Receive TWI0 Receive UART1 Receive UART0 Receive USART1 Receive USART0 Receive ADC Receive SPI Receive SSC Receive HSMCI Receive Table 7-4. Peripheral DMA Controller Instance name Channel T/R |
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