AS-Interface Slave IC

AS2702 (SAP4.1)

Rev. C, January 2001

Page 8 of 18

input data to be valid within a specific time window relative to the HL-edge of the strobe,

after completion of the strobe’s L-phase.

If necessary, output data as per ha) and hb) can be easily latched with the LH-edge of strobe

DSTBn as they will remain valid for about 0.4 µs beyond as a minimum.

Care must be taken however, that signal delay added by external circuitry is lower for the

strobe than for the data.

Fig. 2: Timing of data transfer at data port D3, …, D0 relative to strobe DSTBn

The following table specifies the timing parameters relating to fig. 2:

6\PERO

3DUDPHWHU

PLQ

PD[

8QLW

1RWH

tSTB

Delay DSTBn HL-edge to Dx

output data valid

1.5

µs

tDSTBn

DSTBn strobe width

6

6.8

µs

1

tOUTOFF

Delay DSTBn LH-edge to Dx

output off

0.2

1

µs

2

tINP

Input data valid time window

10.5

12.5

µs

3

Notes:

1

Pulse width depends substantially on value of external pull-up resistor

2

Applies only to data port pins set to 'output / input' operation

3

Timing reference is DSTBn HL-edge.

Applies only to data port pins set to either 'output / input' or 'input' operation

Data in

Data out

Data in

Data out

t

STB

t

t

t

DSTBn

t

INPmin

t

INPmax

Dx

Dx

DSTBn