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ALT6725P9 데이터시트(PDF) 8 Page - ANADIGICS, Inc

부품명 ALT6725P9
상세설명  HELP3E Dual-band Cellular & PCS LTE 3.4 V Linear Power Amplifier Module
PDF  13 Pages
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제조업체  ANADIGICS [ANADIGICS, Inc]
홈페이지  http://www.anadigics.com
Logo ANADIGICS - ANADIGICS, Inc

ALT6725P9 데이터시트(HTML) 8 Page - ANADIGICS, Inc

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PRELIMINARY DATA SHEET - Rev 1.0
07/2012
ALT6725
APPLICATION INFORMATION
To ensure proper performance, refer to all related
Application Notes on the ANADIGICS web site: http://
www.anadigics.com along with Figure 3, which shows
the recommended ON/OFF timing sequence for RFIN,
control voltages, and supply voltages.
Shutdown Mode
The power amplifier may be placed in a shutdown
Table 8: Bias Control
mode by applying logic low levels (see Operating
Ranges table) to the VENABLE and VMODE pads.
Bias Modes
The power amplifier may be placed in Low, Medium,
or High Bias modes by applying the appropriate logic
level (see Operating Ranges table) to the VMODE pin.
The Bias Control table lists the recommended modes
of operation for various applications.
APPLICATION
POUT
LEVELS
BIAS
MODE
VEN_CELL V
MODE1
VMODE2
VCC
VBATT
Low Bias Mode
< +9 dBm
Low
+1.8 V+1.8+1.8 V
0.8 - 4.35 V> 3.2 V
Medium Bias Mode
> +9 dBm
< +15 dBm
Medium
+1.8 V+1.8 V0 V
0.8 - 4.35 V> 3.2 V
High Bias Mode
> +15 dBmHigh+1.8 V0 V0 V
1.3 - 4.35 V> 3.2 V
Shutdown-
Shutdown0 V0 V0 V3.2 - 4.35 V> 3.2 V
VEN_PCS
VEN_CELL, PCS
VCC/VCCA
note 1
RFIN_CELL, PCS
notes 1,2
OFF Sequence
Referenced After 90% of Rise
Time
Referenced Before10% of Fall
Time
ON Sequence
On Sequence Start
T_0N=0µ
T_0N+1µS
T_0N+3µS
Off Sequence Start
T_0FF= 0µ
T_0FF+2µST_0FF+3µS
Vcontrols
Venable/Vmode(s)
Rise/Fall Max 1
µS
Defined at 10% to 90%
of Min/Max Voltage
Figure 3: Recommended ON/OFF Timing Sequence
Notes:
(1) Level might be changed after RF is ON.
(2) RF OFF defined as PIN ≤ -30 dBm.
(3) Switching simultaneously between VMODE and VEN is not recommended.



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