AD571

REV. A

–8–

zero, blanking the previously active port at the same time. Sub-

sequently, this second device can be read by the microprocessor,

and so-forth. The status lines are wire-ored in 2 groups and

connected to the two remaining control pins. This allows a con-

version status check to be made after a convert command, if

necessary. The ADCs are divided into two groups to minimize

the loading effect of the internal pull-up resistors on the DATA

READY

buffers.

OUTLINE DIMENSIONS

Dimensions shown in inches and (mm).

18-Lead Ceramic Dual-In-Line Package

with the 2 control bits (which act as outputs), are used to con-

trol the 8 AD571s. When a control line is in the “1” or high

state, the ADC will be automatically blanked. That is, its out-

puts will be in the inactive open state. If a single control line is

switched low, its ADC will convert and the outputs will auto-

matically go active when the conversion is complete. The result

can then be read from the two peripheral ports; when the next

conversion is desired, a different control line can be switched to