AD7628

–7–

REV. A

MICROPROCESSOR INTERFACE

Figure 11. AD7628 Dual DAC to 6800 CPU Interface

PROGRAMMABLE WINDOW COMPARATOR

Figure 13. Digitally Programmable Window Comparator

(Upper and Lower Limit Detector)

PROGRAMMABLE STATE VARIABLE FILTER

Figure 12. AD7628 Dual DAC to 8085 CPU Interface

In the circuit of Figure 13, the AD7628 is used to implement a

programmable window comparator. DACs A and B are loaded

with the required upper and lower voltage limits for the test,

respectively. If the test input is not within the programmed lim-

its, the pass/fail output will indicate a fail (logic zero).

In this state, variable or universal filter configuration (Figure

14) for DACs A1 and B1 control the gain and Q of the filter

characteristic, while DACs A2 and B2 control the cutoff fre-

AD7628. Op amps are 2

× AD644. C3 compensates for the

effects of op amp gain-bandwidth limitations.

The filter provides low pass, high pass and band pass outputs

and is ideally suited for applications where microprocessor con-

trol of filter parameters is required, e.g., equalizer, tone con-

trols, etc.

to 15 kHz and Q = 0.3 to 4.5.

Figure 14. Digitally Controlled State Variable Filter

CIRCUIT EQUATIONS

1

2

π R

Q =

R

3

R

4

.

R

F

R

FBB1

R

F

R

S

NOTE

DAC equivalent resistance equals

256

× DAC Ladder resistance

()

DAC Digital Code