AD7854LARS datasheet(15/28 Pages) AD

15 / 28 page

AD7854/AD7854L

REV. B

–15–

Transfer Functions

For the unipolar range the designed code transitions occur

midway between successive integer LSB values (i.e., 1/2 LSB,

3/2 LSBs, 5/2 LSBs . . . FS – 3/2 LSBs). The output coding is

straight binary for the unipolar range with 1 LSB = FS/4096 =

3.3 V/4096 = 0.8 mV when VREF = 3.3 V. The ideal input/

output transfer characteristic for the unipolar range is shown in

Figure 14.

OUTPUT

CODE

111...111

111...110

111...101

111...100

000...011

000...010

000...001

000...000

0V 1LSB

+FS –1LSB

VIN = (AIN(+) – AIN(–)), INPUT VOLTAGE

1LSB =

4096

Figure 14. AD7854/AD7854L Unipolar Transfer

Characteristic

Figure 13 shows the AD7854/AD7854L’s

±VREF/2 bipolar ana-

log input configuration. AIN(+) cannot go below 0 V, so for the

full bipolar range, AIN(–) should be biased to at least +VREF/2.

Once again the designed code transitions occur midway between

successive integer LSB values. The output coding is twos

complement with 1 LSB = 4096 = 3.3 V/4096 = 0.8 mV. The

ideal input/output transfer characteristic is shown in Figure 15.

OUTPUT

CODE

011...111

011...110

000...001

111...111

000...000

000...010

000...001

000...000

VIN = (AIN(+) – AIN(–)), INPUT VOLTAGE

1LSB =

4096

(VREF/2) – 1LSB

(VREF/2) + 1 LSB

VREF/2

+ FS – 1LSB

FS = VREFV

Figure 15. AD7854/AD7854L Bipolar Transfer Characteristic

Input Ranges

The analog input range for the AD7854/AD7854L is 0 V to

VREF in both the unipolar and bipolar ranges.

The only difference between the unipolar range and the bipolar

range is that in the bipolar range the AIN(–) should be biased

up to at least +VREF/2 and the output coding is twos comple-

ment (see Table V and Figures 14 and 15).

Table V. Analog Input Connections

Analog Input

Input Connections

Connection

Range

AIN(+)

AIN(–)

Diagram

0 V to VREF

VIN

AGND

Figure 12

±VREF/22

VIN

VREF/2

Figure 13

NOTES

1Output code format is straight binary.

2Range is

±V

REF/2 biased about VREF/2. Output code format is twos complement.

Note that the AIN(–) pin on the AD7854/AD7854L can be

biased up above AGND in the unipolar mode, or above VREF/2

in bipolar mode if required. The advantage of biasing the lower

end of the analog input range away from AGND is that the analog

input does not have to swing all the way down to AGND. Thus,

in single supply applications the input amplifier does not have to

swing all the way down to AGND. The upper end of the analog

input range is shifted up by the same amount. Care must be

taken so that the bias applied does not shift the upper end of the

analog input above the AVDD supply. In the case where the ref-

erence is the supply, AVDD, the AIN(–) should be tied to AGND

in unipolar mode or to AVDD/2 in bipolar mode.

. . .

AIN(+)

AIN(–)

VIN = 0 TO VREF

TRACK AND HOLD

AMPLIFIER

DB0

DB11

STRAIGHT

BINARY

FORMAT

AD7854/AD7854L

Figure 12. 0 to VREF Unipolar Input Configuration

2’S

COMPLEMENT

FORMAT

VREF/2

. . .

AIN(+)

AIN(–)

VIN = 0 TO VREF

TRACK AND HOLD

AMPLIFIER

DB0

DB11

AD7854/AD7854L

Figure 13.

±VREF/2 about VREF/2 Bipolar Input Configuration

AD7854LARS 데이터시트(PDF) 15 Page - Analog Devices

AD7854LARS 데이터시트(HTML) 15 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28

데이터시트 다운로드

링크 URL