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AD9822JR 데이터시트(PDF) 13 Page - Analog Devices

부품명 AD9822JR
상세설명  Complete 14-Bit CCD/CIS Signal Processor
PDF  15 Pages
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제조업체  AD [Analog Devices]
홈페이지  http://www.analog.com
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AD9822JR 데이터시트(HTML) 13 Page - Analog Devices

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REV. A
–13–
AD9822
Figure 12 shows how the OFFSET pin may be used in a CIS
application for coarse offset adjustment. Many CIS signals have
dc offsets ranging from several hundred millivolts to more than
1 V. By connecting the appropriate dc voltage to the OFFSET
pin, the CIS signal will be restored to “zero.” After the large dc
offset is removed, the signal can be scaled using the PGA to
maximize the ADC’s dynamic range.
AD9822
OFFSET
RED-OFFSET
GREEN-OFFSET
BLUE-OFFSET
VINR
VING
VINB
RED
GREEN
BLUE
0.1 F
AVDD
VREF FROM
CIS MODULE
DC OFFSET
R1
R2
SHA
SHA
SHA
Figure 12. SHA-Mode Used with External DC Offset
Programmable Gain Amplifiers
The AD9822 uses one Programmable Gain Amplifier (PGA) for
each channel. Each PGA has a gain range from 1x (0 dB) to
5.8x (15.5 dB), adjustable in 64 steps. Figure 6 shows the PGA
gain as a function of the PGA register code. Although the gain
curve is approximately “linear in dB”, the gain in V/V varies
nonlinearly with register code, following the equation:
Gain
G
=
+
−
57
14 7
63
63
.
.
where G is the decimal value of the gain register contents, and
varies from 0 to 63.
PGA REGISTER VALUE – Decimal
15
0
12
9
6
3
0
4
8
12 16 20 24 28 32 36 40 44 48 52 56 60 63
5.7
5.0
4.0
3.0
2.0
1.0
Figure 13. PGA Gain Transfer Function



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