ADM485

REV. A

–4–

Test Circuits

R

R

V

OC

V

OD

Figure 1. Driver Voltage Measurement Test Circuit

375

Ω

V

OD3

V

TST

375

Ω

60

Ω

Figure 2. Driver Voltage Measurement Test Circuit 2

A

B

R

LDIFF

C

L1

C

L2

Figure 3. Driver Propagation Delay Test Circuit

V

OUT

C

L

A

B

V

CC

S2

R

L

S1

0V OR 3V

DE IN

DE

Figure 4. Driver Enable/Disable Test Circuit

C

L

V

OUT

RE

A

B

Figure 5. Receiver Propagation Delay Test Circuit

V

OUT

V

CC

S2

R

L

S1

RE IN

RE

C

L

+1.5V

–1.5V

Figure 6. Receiver Enable/Disable Test Circuit

T

PLH

T

PHL

0V

0V

1.5V

1.5V

A–B

RO

V

OL

V

OH

Figure 9. Receiver Propagation Delay

T

ZH

1.5V

1.5V

3V

0V

1.5V

T

HZ

V

OH

V

OH

– 0.5V

0V

R

V

OL

+ 0.5V

T

ZL

1.5V

T

LZ

V

OL

R

RE

O/P LOW

O/P HIGH

Figure 10. Receiver Enable/Disable Timing

Switching Characteristics

–VO

VO

1/2VO

0V

3V

1.5V

1.5V

T

PLH

T

SKEW

VO

0V

90% POINT

10% POINT

90% POINT

10% POINT

T

PHL

B

A

T

SKEW

T

R

T

F

Figure 7. Driver Propagation Delay, Rise/Fall Timing

T

ZH

1.5V

DE

1.5V

3V

0V

2.3V

T

HZ

V

OH

V

OH

– 0.5V

0V

A, B

V

OL

+ 0.5V

T

ZL

2.3V

T

LZ

V

OL

A, B

Figure 8. Driver Enable/Disable Timing