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KTPF0100UG 데이터시트(PDF) 34 Page - Freescale Semiconductor, Inc |
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KTPF0100UG 데이터시트(HTML) 34 Page - Freescale Semiconductor, Inc |
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34 / 74 page ![]() KTPF0100UG, Rev. 2.0 34 Freescale Semiconductor Graphical User Interface Description Linear regulators can be programmed using the LINEAR sub-tab. It enables the user to control the output voltage and the start-up sequence of the regulators as well as to choose between the standby and low power mode. Figure 30. LDO Regulators Tab The Interrupts tab provides user access to the four interrupt registers in PF0100 functional register map. The user can choose to read the interrupts by pressing on the “Read Interrupt x” button. Each interrupt is latched so that even if the interrupt source becomes inactive, the interrupt will remain set until cleared. Each interrupt can be cleared by writing a "1" to the appropriate bit in the Interrupt Status register; this will also cause the INTB pin to go high. Each interrupt can be masked by setting the corresponding mask bit to a 1. As a result, when a masked interrupt bit goes high, the INTB pin will not go low. A masked interrupt can still be read from the Interrupt Status register. The sense registers contain status and input sense bits so the system processor can poll the current state of interrupt sources. They are read only, and neither latched nor clearable. |
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