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ADV7150LS170 데이터시트(PDF) 25 Page - Analog Devices

부품명 ADV7150LS170
상세설명  CMOS 220 MHz True-Color Graphics Triple 10-Bit Video RAM-DAC
PDF  36 Pages
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제조업체  AD [Analog Devices]
홈페이지  http://www.analog.com
Logo AD - Analog Devices

ADV7150LS170 데이터시트(HTML) 25 Page - Analog Devices

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ADV7150
–25–
REV. A
WHITE
LEVEL
100 IRE
43 IRE
IOR, IOB
IOG
mA
mA
V
V
26.67
1.000
0.698
18.62
00
00
8.05
0.302
BLACK/
BLANK
LEVEL
SYNC
LEVEL
Figure 31. Composite Video Waveform SYNC
WHITE LEVEL
BLACK LEVEL
92.5 IRE
7.5 IRE
IOR, IOB, IOG
mA
V
19.05
0.714
00
1.44
0.054
BLANK LEVEL
Figure 32. Composite Video Waveform
(Pedestal = 7.5 IRE; RSET = 280 Ω)
WHITE LEVEL
100 IRE
IOR, IOB, IOG
mA
V
19.05
0.714
00
BLACK/ BLANK
LEVEL
Figure 33. Composite Video Waveform
(Pedestal = 0 IRE; RSET = 259 Ω)
RSET ( )
Video Signal
265
SYNC
decoded on IOG; Pedestal = 0 IRE
280
No SYNC decoded; Pedestal = 7.5 IRE
259
No SYNC decoded; Pedestal = 0 IRE
IPLL Synchronization Output Control
This output synchronization signal is used in applications where
it is necessary to synchronize multiple palette devices (ADV7150
+ ADV7151) to subpixel resolution. Each devices IPLL output
signal is in phase with its analog RGB output signal. If multiple
devices have differing output delays, the time difference can be
derived from the IPLL signals. This time difference is then used
to phase shift the CLOCK inputs on one or other of the devices
inputs.
The IPLL signal is internally triggered by either the falling edge
of SYNC or BLANK as determined by CR21 of Command
Register 2.



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