RT8016

13

DS8016-04 February 2012

www.richtek.com

©

Copyright 2012 Richtek Technology Corporation. All rights reserved.

is a registered trademark of Richtek Technology Corporation.

Connect all analog grounds to a common node and then

connect the common node to the power ground behind

the output capacitors.

An example of 2-layer PCB layout is shown in Figure 7

to Figure 8 for reference.

Figure 6. EVB Schematic

Figure 7. Top Layer

Figure 8. Bottom Layer

LX

GND

RT8016

EN

FB/VOUT

L1

C3

C1

R1

R2

VIN

3

2

1, 5

4

6

C2

R3

Table 1. Recommended Inductors

Supplier

Inductance

(

μH)

Current Rating (mA)

DCR

(m

Ω)

Dimensions

(mm)

Series

TAIYO YUDEN

2.2

1480

60

3.00 x 3.00 x 1.50

NR 3015

GOTREND

2.2

1500

58

3.85 x 3.85 x 1.80

GTSD32

Sumida

2.2

1500

75

4.50 x 3.20 x 1.55

CDRH2D14

Sumida

4.7

1000

135

4.50 x 3.20 x 1.55

CDRH2D14

TAIYO YUDEN

4.7

1020

120

3.00 x 3.00 x 1.50

NR 3015

GOTREND

4.7

1100

146

3.85 x 3.85 x 1.80

GTSD32

Supplier

Capacitance

(

μF)

Package

Part Number

TDK

4.7

603

C1608JB0J475M

MURATA

4.7

603

GRM188R60J475KE19

TAIYO YUDEN

4.7

603

JMK107BJ475RA

TAIYO YUDEN

10

603

JMK107BJ106MA

TDK

10

805

C2012JB0J106M

MURATA

10

805

GRM219R60J106ME19

MURATA

10

805

GRM219R60J106KE19

TAIYO YUDEN

10

805

JMK212BJ106RD