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LM8335 데이터시트(PDF) 9 Page - Texas Instruments |
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LM8335 데이터시트(HTML) 9 Page - Texas Instruments |
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9 / 16 page ![]() LM8335 www.ti.com SNVS840 – JUNE 2012 Figure 6. Extended Register Write Command Sequence INTERNAL POR OPERATION There are two internal POR circuits: one on the VDD supply and one on the VDDIO supply that initialize the LM8335 when power is applied. The duration of the reset is an RC delay which is based on the ramp rate and not a threshold voltage of the VDD/VDDIO supply. VIO can be activated as soon as VDD and VDDIO have reached their minimum respective voltage levels however the LM8335 may still be in reset due to the internal POR timing. When VIO is asserted after VDD and VDDIO tPORC Max, the device reset will be released based on the VIO tREADY timing. Copyright © 2012, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Links: LM8335 |
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