TPS5403 datasheet(11/18 Pages) TI

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OUT max

0.25

(

)

INmin

OUT

INRMS

OUT

INmin

OUT

8 fsw

ESR

OUT

2 V

× D

Lpeak

OUT

INmax

OUT

INmax

LRMS

)

(

)

L fsw

× ×

OUT

fsw

D =

OUT

LIR

fsw

TPS5403

www.ti.com

SLVSBK5 – SEPTEMBER 2012

(3)

(4)

(5)

(6)

For this design example, use LIR = 0.3 and the inductor is calculated to be 13.3 µH with VIN = 12 V, VOUT = 3.3 V

and fSW = 300 kHz. Choose 13 µH value for the standard inductor and the peak to peak inductor ripple is about

34% of 2-A DC load current.

Output Capacitor Selection

There are two primary considerations for selecting the value of the output capacitor. The output capacitors are

selected to meet load transient and output ripple’s requirements.

Equation 7 gives the minimum output capacitance to meet the transient specification. For this example,

L = 13 µH,

ΔIOUT = 2 A – 0.0 A = 2 A and ΔVOUT = 330 mV (10% of regulated 3.3V). Using these numbers gives

a minimum capacitance of 24 µF. A standard 33-µF ceramic is chosen in the design.

(7)

The selection of CO is driven by the effective series resistance (ESR). Equation 8 calculates the minimum output

capacitance needed to meet the output voltage ripple specification. Where fSW is the switching frequency, ΔVOUT

is the maximum allowable output voltage ripple, and

ΔiL is the inductor ripple current. In this case, the maximum

output voltage ripple is 33 mV (1% of regulated 3.3 V). From Equation 4, the output current ripple is 0.6 A. From

Equation 8, the minimum output capacitance meeting the output voltage ripple requirement is 8.3 µF with 3-m

Ω

ESR resistance.

(8)

After considering both requirements, for this example, one 22-µF, 6.3-V X7R ceramic capacitor with 3-m

Ω ESR

should be used.

Input Capacitor Selection

A minimum 10-µF X7R/X5R ceramic input capacitor is recommended to be added between VIN and GND. These

capacitors should be connected as close as physically possible to the input pins of the converters as they handle

the RMS ripple current shown in Equation 9. For this example, IOUT = 2 A, VOUT = 3.3 V, minimum VINmin = 9.6 V,

from Equation 9, the input capacitors must support a ripple current of 1.15-A RMS.

(9)

The input capacitance value determines the input ripple voltage of the regulator. The input voltage ripple can be

calculated using Equation 10. Using the design example values, IOUTmax = 2 A, CIN = 10 µF, fSW = 300 kHz, yields

an input voltage ripple of 167 mV.

(10)

To prevent large voltage transients, a low ESR capacitor sized for the maximum RMS current must be used.

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