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LT1389 데이터시트(PDF) 11 Page - Linear Technology

부품명 LT1389
상세설명  Energy Harvesting DC/DC with Battery Backup Low Noise LDO Post Regulator
PDF  20 Pages
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제조업체  LINER [Linear Technology]
홈페이지  http://www.linear.com
Logo LINER - Linear Technology

LT1389 데이터시트(HTML) 11 Page - Linear Technology

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LTC3330
11
3330p
For more information www.linear.com/LTC3330
OUT0,OUT1,OUT2(Pins30,31,32):VOUTVoltageSelect
Bits. Tie high to VIN3 or low to GND to select the desired
VOUT (see Table 1). Do not float.
pin FuncTions
GND (Exposed Pad Pin 11): Ground. The exposed pad
must be connected to a continuous ground plane on the
second layer of the printed circuit board by several vias
directly under the LTC3330.
block DiagraM
3330 BD
BANDGAP
REFERENCE
INTERNAL
RAIL
GENERATION
PRIORITZER
UVLO
UVLO_SET
SLEEP
VIN
VREF
AC1
20V
10
8
AC2
BAT
9
16
EH_ON
SLEEP
ILIM_SET
VREF
PGVOUT
PGLDO
29
28
27
–
+
–
+
SLEEP
0.9*VREF
VREF
–
+
–
+
0.925*VREF
CAP
11
SW
VIN2
GND
33
SWA
SWB
LDO_IN
VOUT
15
14
13
21
LDO_OUT
SCAP
BAL
20
1
2
VIN3
26
BUCK-BOOST
CONTROL
ILIM_SET
UVLO_SET
12
3
3
3
32, 31, 30
22, 23, 24
4
4, 5, 6, 7
UV[3:0]
3
19, 18, 17
IPK[2:0]
OUT[2:0]
LDO[2:0]
BUCK
CONTROL
LDO_EN
25
–
+



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