| 전자부품 데이터시트 검색엔진 |
|
CSP1027 데이터시트(PDF) 46 Page - Agere Systems |
|
|
|||||||||||||||||||||||||||||
CSP1027 데이터시트(HTML) 46 Page - Agere Systems |
|
46 / 64 page ![]() CSP1027 Voice Band Codec for Data Sheet Cellular Handset and Modem Applications December 1999 Lucent Technologies Inc. 46 7 Application Information (continued) 7.5.4 Enhanced Oversampling Clock Generation If system constraints make the requirement of integer multiples of 125 x the sampling rate (typically integer multiples of 1.0 MHz) difficult to provide, the CSP1027 can also operate with the ICLK0 internal clock rate at integer multiples of the sampling rate (typically integer multiples of 8 kHz). See Section 4.5 on page 16 for more information. The following two examples illustrate the usage: Application Example 4 s Standard codec application. s CLK input clock rate: 2.048 MHz. s Codec sampling rate, fS: 8 kHz. Solution: s CKOS = 125 x 8 kHz = 1.0 MHz, so CLK/CKOS = 2.048 or CLK/CKS = 2.048 x 125 = 256. Values of M and N must be found to satisfy this requirement, as shown below. s Set CDIV0 for ÷1 (CDIV0 = 0); hence, fICLK = fCLK. s Using the equations from Section 4.5 on page 16, Hence, M = 2, S = 1, and N = 6. (Note that if CDIV0 set for ÷ 2, then M = 1, S = +1, and N = 3, which is not allowed.) s Using Tables 2 through 4 on page 18: CDIV3 = 00 0010. CDIFS = 0. CDIF0 = 01 0101. CDIF1 = 10 0110. CDIF2 = 0 0000. Application Example 5 s IS-54 application. s Codec sampling rate, fS: 8 kHz. s CLK needs to be a common multiple of 8 kHz and 48 x 48.6 kHz. s Need phase adjustment. Solution: s 48 x 48.6 = 2.3328E6 2.3328E6 ÷ 8E3 = 291.6 To get a common multiple, 291.6 must be multiplied by a factor to become an integer: 291.6 x 10 = 2916 (an integer). So, CLK/CKS = 2916 and CLK/ICLK0 = 2 CLK = 2916 x 8E3 = 23.328E6. s CLK input clock rate: 23.328 MHz. s Set CDIV0 for ÷2 (CDIV0 = 1) to allow advance/ retard for phase adjustment. s ICLK0 internal clock rate is 11.664 MHz. s Using the equations from Section 4.5 on page 16, Hence, M = 12, S = –1, and N = 42. s Using Tables 2 through 4 on page 18: CDIV3 = 00 1100. CDIFS = 1. CDIF0 = 00 0011. CDIF1 = 11 0110. CDIF2 = 0 0000. FICLK0 FS ----------------- 125 M × () S2 × () + = FICLK0 FS ----------------- 2.048 MHz 8 kHz ------------------------------ 256 125 2 × () 16 × () + == = FICLK0 FS ----------------- 11.664 MHz 8 kHz --------------------------------- 1458 125 12 × () 1 – 42 × () + == = |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |