STM8S003K3 datasheet(82/100 Pages) STMICROELECTRONICS

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Table 44: ADC characteristics

Unit

Max

Typ

Min

Conditions

Parameter

Symbol

MHz

VDD =2.95 to 5.5 V

ADC clock frequency

fADC

VDD =4.5 to 5.5 V

VDD

VSS

Conversion voltage range

(1)

VAIN

Internal sample and hold

capacitor

CADC

μs

0.75

fADC = 4 MHz

Minimum sampling time

(1)

0.5

fADC = 6 MHz

μs

Wake-up time from standby

tSTAB

μs

3.5

fADC = 4 MHz

Minimum total conversion time

(including sampling time,

10-bit resolution)

tCONV

μs

2.33

fADC = 6 MHz

1/fADC

(1) During the sample time the input capacitance C

AIN (3 pF max) can be charged/discharged

by the external source. The internal resistance of the analog source must allow the

capacitance to reach its final voltage level within tS. After the end of the sample time tS,

changes of the analog input voltage have no effect on the conversion result. Values for the

sample clock tS depend on programming.

Table 45: ADC accuracy with RAIN < 10 kΩ , VDD= 5 V

Unit

Max

(1)

Typ

Conditions

Parameter

Symbol

LSB

3.5

1.6

fADC = 2 MHz

Total unadjusted error

(2)

|ET|

2.2

fADC = 4 MHz

4.5

2.4

fADC = 6 MHz

2.5

1.1

fADC = 2 MHz

Offset error

(2)

|EO|

DocID018576 Rev 3

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STM8S003K3 STM8S003F3

Electrical characteristics

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